
CONFIDENTIAL [AK8999A/AW/AD]
MS1600-E-00 2014/05
- 25 -
■ Description of Operation Timing Status (pressure detection circuit effective)
Note1) Only operation in the quasi 2nd order correction mode by piecewise linear approximation
Note2) Only operation in the Fs = 0.83kHz mode
State No. CLK Operations
Start Up 00 It is the time until analog circuits operate stably.
Analog reference circuits as VREF, IREF, etc. start up and
adjusted output reference voltage (VSS or VDD or
0.5*VDD) is output from the VOUT pin.
PU0 01 CLK = 30 Clock count start
Analog circuits startup
02 CLK = 0 or 5
Ta = 25
C detected comparator operation Note1)
STV 20 CLK = 30 STV circuits operation
MSR 30 CLK = 30 Result of pressure correction is output from VOUT pin.
Idel 40 CLK = 0 or 505 Idling
With Fs = 8.33kHz, no idling and in continuous operation.
Idling period
Fs = 0.83kHz 505 CLK
Fs = 8.33kHz 0 CLK
PU1 11 CLK = 0 or 30 Clock count start
Analog circuits startup Note2)
12 CLK = 0 or 5
Ta = 25
C detected comparator operation Note1)
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